(1) Field of the Invention
The present invention relates to a power-on reset circuit device and, more particularly, to a power-on reset circuit device which is capable of setting a power-on reset timing more than two times.
(2) Description of the Related Art
A conventional power-on reset circuit of the kind to which the present invention relates is shown in FIG. 1. The circuit has a series circuit of a diode group 10 and a resistor 11 connected between a power supply source V.sub.CC and a ground GND, which produces a reference voltage V.sub.3 at a common junction node. The circuit also has a series circuit of a resistor 12 and a resistor 13 also connected between the power supply source V.sub.CC and the ground GND, which produces at a common junction node a divided voltage V.sub.2 to be monitored. The circuit further has a comparator 14 which compares the divided voltage V.sub.2 with the reference voltage V.sub.3 and outputs a power-on reset signal S.sub.RST.
The operation of the above circuit is explained with reference to FIG. 2. The reference voltage V.sub.3 produced by the diode group 10 and the resistor 11 is 1.8 V (=0.6 V.times. 3) on the assumption that a forward-voltage V.sub.F of each diode is 0.6 V. To the comparator 14 are supplied this reference voltage V.sub.3 and the divided voltage V.sub.2, obtained with the power supply voltage V.sub.CC being divided by the resistors 12 and 13, which voltage increases with the rise of the power supply voltage V.sub.CC. When the divided voltage V.sub.2 becomes larger than the reference voltage V.sub.3 (=1.8 V), an inversion of the output of the comparator takes place at the point A in FIG. 2. The power-on reset signal S.sub.RST thus obtained causes the internal circuit to turn from a set state to a reset state, thereby protecting the semiconductor device from a malfunction caused by a transitional condition at the rising, and causes it to operate normally thereafter.
In this conventional power-on reset circuit, since only one point (point A), that is, one kind of voltage is watched, it is effective only for one kind of power supply source. If, for instance, more than three kinds of power supply sources are used together for the same semiconductor device, there was a possibility of occurrence of abnormal waveforms of the output voltage in a power supply source where the power-on reset does not work, even though one kind of power supply voltage reaches the point A, because of the different rise time of each of the power supply sources.
In the case where two power-on reset circuits shown in FIG. 1 are adopted to apply the power-on resetting to the circuit which is operable under three different levels of power supply sources, although the possibility of occurrence of the abnormal waveforms of the output voltages becomes low, the problems of increasing the circuit current and the number of necessary components still remain because two circuits having the same circuit configuration but having different reference voltages are required. This is a problem to be solved in the conventional circuit.